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SWIFT
SWIFTsim
Commits
e3f5ce4e
Commit
e3f5ce4e
authored
2 years ago
by
Peter W. Draper
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Add cpuid for AMD Milan and Genoa CPUs. Note will need GCC 13 for Genoa znver4 support.
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d1697ce9
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2 merge requests
!1745
Fixed issues with missing unlocks/dependencies/debug checks for top level...
,
!1737
Add cpuid for AMD Milan and Genoa CPUs.
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m4/ax_gcc_archflag.m4
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e3f5ce4e
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@@ -147,6 +147,8 @@ case $host_cpu in
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@@ -147,6 +147,8 @@ case $host_cpu in
*06??f??:*:*:*|6??f??:*:*:*) ax_gcc_arch="bdver3 bdver2 bdver1 amdfam10 k8" ;;
*06??f??:*:*:*|6??f??:*:*:*) ax_gcc_arch="bdver3 bdver2 bdver1 amdfam10 k8" ;;
*070?f??:*:*:*|70?f??:*:*:*) ax_gcc_arch="btver2 btver1 amdfam10 k8" ;;
*070?f??:*:*:*|70?f??:*:*:*) ax_gcc_arch="btver2 btver1 amdfam10 k8" ;;
83?f??:*:*:*) ax_gcc_arch="znver2 znver1 btver2 btver1 amdfam10 k8" ;;
83?f??:*:*:*) ax_gcc_arch="znver2 znver1 btver2 btver1 amdfam10 k8" ;;
a0?f??:*:*:*) ax_gcc_arch="znver3 znver2 znver1 btver2 btver1 amdfam10 k8" ;;
a1?f??:*:*:*) ax_gcc_arch="znver4 znver3 znver2 znver1 btver2 btver1 amdfam10 k8" ;;
*???f??:*:*:*) ax_gcc_arch="amdfam10 k8" ;;
*???f??:*:*:*) ax_gcc_arch="amdfam10 k8" ;;
esac ;;
esac ;;
*:746e6543:736c7561:48727561) # IDT / VIA (Centaur)
*:746e6543:736c7561:48727561) # IDT / VIA (Centaur)
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